`timescale 1ns/1ps

module MultiCycleProcessor(
	iClk, iPCreset,
	iInstWrENB,	// instMemory의 값을 갱신하기 위한 입력 (iWriteENB)
	iInstAddr,	// iInstWrite == 1의 상태에서 접근되는 instruction 주소 [7:0]
	iInstInput, // iInstWrite == 1의 상태에서 입력되는 instruction [7:0]
	oDataMemOut	// output of data memory module
	);
	
	input iClk, iPCreset, iInstWrENB;
	input [7:0] iInstAddr, iInstInput;
	output [7:0] oDataMemOut;
  wire PCWriteCond, PCWrite, lorD, MemRead, MemWrite, MemtoReg, IRWrite, ALUSrcA, RegWrite, RegDst;
	wire [1:0] ALUSrcB, PCSource;
	wire [2:0] ALUCont;
	wire [5:0] wOPcode;
	wire [5:0] wFuncCode;
	
	Multi_datapath datapath1(
	  iClk, iPCreset,
	  iInstWrENB,	// instMemory????? ?????? ??? ??? (iWriteENB)
	  iInstAddr,	// iInstWrite == 1???????? ?????? instruction ??? [7:0]
	  iInstInput, // iInstWrite == 1???????? ?????? instruction [7:0]
	  PCWrite, PCWriteCond, lorD, MemRead, MemWrite, MemtoReg, IRWrite, RegDst, RegWrite, ALUSrcA,
	  ALUSrcB, PCSource, ALUCont,
	  wOPcode,		// instruction????? 6-bit [31:26]
	  wFuncCode,	// instruction????? 6-bit [5:0]
	  oDataMemOut	// dataMemory read??? ???
	  );
		
	Multi_Control_Unit control_unit1(
		iClk,
    iPCreset,
    iInstWrENB,
   	wOPcode,
	  wFuncCode,
	  PCWriteCond, 
	  PCWrite, 
	  lorD,
	  MemRead, 
	  MemWrite, 
	  MemtoReg, 
	  IRWrite,
	  PCSource,
	  ALUSrcA, 
    ALUSrcB,
	  RegWrite, 
	  RegDst,
	  ALUCont
	  );
	
endmodule


